Effective PCB Substrate Design Practices for IC Package Assembly: A Case Study

In the semiconductor package assembly process, achieving precision in substrate design is a crucial element. The substrate should be designed taking into account the ease of assembly. This applies to die attaching, both flip-chip and traditional die attach for wire bonding. In this article, we will look at a specific case study involving shortcomings of a substrate design, focusing on challenges that were faced during the assembly, die attach, and wire bonding stages.

Case Study Overview For COB Substrate Design

Recently, we faced significant challenges during a Chip-on-Board (COB) bonding job involving a two-die configuration. Au wire bonding the primary die was not a path but rather straightforward and encountered no issues. However, the secondary die presented a unique challenge due to the design of the PCB substrate.

Challenges Faced During Au Wire Bonding

Wire Bonding Parameter Optimization To Bond on ENIG-finished Au Vias for Bond Strength

The second die attach pad, or the die attach surface, was designed with Au vias instead of a continuous Au bonding pad covering the full surface like the primary die attach surface with Electroless Nickel Palladium Immersion Gold (ENEPIG) processed surface. Also, the Au vias were not ENEPIG finish but Electroless Nickel Immersion Gold (ENIG), requiring hours of parameter fine-tuning to achieve acceptable bond strength.

Spatial Constraints in Die Downbonding (GND) on Limited Au Via Surface

The primary challenge was the spatial limitation for downbonding from the die; the die itself covered more than 95% of the Au via surface that was supposed to be used for downbonding. Even with minimal epoxy overflow from all sides of the die, less than 150 micrometers, there was not enough exposed surface for downbonding.

Capillary Tool Risks with Restricted Space

Even with the extremely small capillary, high loop size and changing the PCB position and alignment there was no simply enough space to down bond with out the risk of the capillary tool hitting the side wall of the the die casing side wall chipping or even die crack.


Strategic Solutions and Best Practices For PCB substrate design

Ensure Die Attach Pad Is Sufficiently Spacious

Ensure that either the Au vias covered or Full Au surfaced die attaches surface is atleast 750um bigger than the die on all sides for down boding the pads at the edge of the die, and if the down bond is from a die pad from the middle or further away from edge of the die, make sure to leave at least 2 times the length of the bond pad to the edge of the die distance to form proper suitable wire loop size. 

Consider Alternative Grounding Options

Strategically place spare bond pads/vias around the die attach surface to cater to errors caused by the die attach/wire bonding mishaps. It is always better to design the substrate for versatility rather than for small substate size for small volume builds for R&D purposes where the main purpose of the build is for proof of concept or specific function testing.

Implement Design for Manufacturability (DFM)

Before sending the pcbdoc/cad files to the PCB manufacturer for substrate fabrication, always involve the assembly engineer or assembly house in general to make sure that die attach and wire bonding can be done as intended. Their experience can inform the design adjustments that accommodate real-world assembly challenges.


PCB with a die attached pad barely larger than the die, showing inadequate space for ground connections and high risk of die damage
Challenges in PCB Die Attach: Limited Space and Bonding Risks during bonding.
PCB with gold grounding wire expertly bonded to vias away from the cramped die attach pad to avoid die damage.


The case study presented demonstrates the importance of thoughtful substrate design in semiconductor package assembly. By adopting these best practices, assembly facilities can improve their capability to handle complex packaging scenarios, thereby enhancing overall reliability and efficiency in semiconductor manufacturing. These strategies help in addressing immediate problems and also serve as proactive measures to prevent future issues, ensuring smoother operations and higher quality outcomes in the assembly process.

Please don’t hesitate to contact us for you PCB Substrate Design, PCB Substrate Fabrication and Package Assembly need. 

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What is Chip On Board Technology (COB)?

COB technology simplifies electronic device assembly by placing the microchip directly onto the circuit board. This direct bonding can be achieved through wire bonding or solder bumps. For a deeper understanding of COB’s basics, Electronics Hub offers a comprehensive guide that breaks down the technology and its application.

A Short History of COB

COB technology emerged in the late 20th century as the electronics manufacturing industry sought compact, efficient circuit integration methods. The evolution from surface mount technology (SMT) and through-hole technology (THT) to COB represents a significant leap in manufacturing. Historical insights and the technological progression are well-documented in IEEE’s electronic library.

The Role of COB in Electronics

From LED displays to automotive applications, COB technology has broadened the horizons of electronics manufacturing. Its influence on LED technology, for example, has led to devices that are not only brighter but also more energy-efficient. ScienceDirect publishes research articles detailing COB technology’s impact on the LED industry and beyond.

The Benefits of COB

COB technology brings several advantages to electronic devices, including reduced size and improved thermal management. For those interested in the technicalities of how COB enhances device performance and longevity, the American Society of Mechanical Engineers (ASME) provides resources and papers on thermal management solutions in electronic packaging.


COB technology is at the forefront of driving the electronics industry towards more integrated, efficient, and sustainable solutions. As we advance, the role of COB in fostering innovations in IoT and AI is undeniable. For future trends and insights into COB technology, keeping an eye on TechCrunch’s hardware section can be immensely helpful.

Understanding Multi-Chip Modules: Making Electronics Better

Understanding Multi-Chip Modules: Key Roles of Die Attach and Wire Bonding

Multi-Chip Modules (MCM) have transformed how electronic devices are built, offering better performance in a tinier package. At the heart of making MCM technology work are two crucial steps: Die Attach and Wire Bonding. These steps are key for making sure the tiny parts inside work well and last long.

What are Multi-Chip Modules?

Multi-Chip Modules bring together several semiconductor devices, like ICs (Integrated Circuits), onto one base or package. This makes devices perform better and do more things. The success of putting these chips together relies a lot on die attach and wire bonding. These processes make sure the chips are not only physically secure but also connected right, so they work as expected.

Die Attach’s Role in MCM

For MCMs, Die Attach is about sticking each chip firmly to the module’s base. This step is critical not just for keeping the chips in place but also for managing heat. Getting rid of heat efficiently is important because it affects how well the module works. Choosing the right materials and methods for die attach can greatly impact the module’s performance. Websites like Semiconductor Engineering delve into the newest approaches and materials used.

Wire Bonding: Connecting Everything Together

After attaching the chips, Wire Bonding is used to link the chips’ contact points to the module’s base or other parts. This needs to be done with great care to ensure the signals are strong and clear, and there’s no unnecessary resistance. The type of wire and how it’s used depend on the module’s use, how it operates, and where it will be used. The International Microelectronics Assembly and Packaging Society (IMAPS) has lots of information on wire bonding and its importance in MCMs.

Why MCMs are Great for Electronics

  • Better Performance: MCMs can do more and work faster by combining several chips.
  • Smaller and Lighter: They help make devices smaller and lighter, which is especially important for things you carry around like phones and wearable tech.
  • More Power-Efficient: MCMs are designed to use power wisely, helping devices last longer on a single charge.

The Challenges of Building MCMs

Putting together MCMs is tricky, especially when it comes to die attach and wire bonding. Making sure everything works together perfectly, without overheating or losing signal, requires a lot of skill and knowledge.

Looking Ahead in MCM Technology

Technology is always moving forward, and so is the way MCMs are made. New techniques in die attach and wire bonding will keep making MCMs even better, helping them meet the growing needs of electronic devices.

Read about Wire Bonding Materials

Read about Substrate Design For Larger Die Sizes

Role of laser grooving technology in the world of ICs

Laser grooving technology has emerged as a game-changer, revolutionizing the precision and efficiency of manufacturing processes in the world of Integrated Circuits (ICs). 

Let’s how Laser Grooving Technology has helped the IC packaging in achieving the required level of precision and ultimately perfection.

Understanding Laser Grooving Technology

The purpose of the Laser grooving technology is to create precise grooves, channels, or cuts on various materials, including those used in IC packaging utilizing the power of laser beams. It harnesses laser ablation techniques, using focused laser energy to vaporize or remove material from the surface, resulting in high precision and accuracy.

The Role of Laser Grooving in IC Packaging

Laser grooving comes into play in multiple stages of manufacturing in IC packaging. 

  1. Wafer Dicing: By precisely cutting through the wafer, laser grooving ensures clean and accurate separation, reducing the risk of chipping or damaging delicate circuitry.
  2. Channel Formation: Laser grooving technology is used for creating channels in IC packages, providing pathways for electrical connections and heat dissipation. These channels facilitate efficient circuit performance and longevity by managing heat generation and enabling effective interconnectivity.
  3. Microvia Drilling: Laser grooving techniques are utilized for drilling microvias, which are tiny holes connecting different layers of the IC package. These microvias enable the successful routing of electrical signals and power distribution, optimizing circuit performance and functionality.

Now that we understand what Laser grooving technology is, let’s how it has become a game changer in IC Packaging.

  • Precision and Accuracy: Laser grooving technology offers unparalleled precision, enabling micro-scale cuts and grooves with minimal material wastage. This high level of accuracy is vital for the intricate geometries and complex circuitry of IC packages.
  • Efficient Processing: Laser grooving enables rapid material removal, resulting in fast processing times. This efficiency contributes to increased productivity, reduced manufacturing cycle times, and enhanced overall throughput.
  • Non-contact Process: As a non-contact technology, laser grooving eliminates the need for physical contact with the delicate surface of IC packages, reducing the risk of damage, contamination, or microscopic defects during processing.
  • Versatility: Laser grooving is compatible with various IC package materials, including ceramics, plastics, metal alloys, and more. This versatility makes it suitable for a wide range of packaging requirements and materials commonly used in the industry.

The precision, efficiency, and non-contact nature of Laser grooving technology makes it a preferred choice for manufacturers seeking superior quality and productivity.  

Level up with an IC package solutions provider who expects to further advance, enabling new possibilities for miniaturization, performance optimization, and the development of cutting-edge electronic devices using advanced technology.

Flip Chip Technology: Advancements in Package Assembly

Flip chip technology dates back to the early 1960’s. It was developed by IBM for their SLT modules used in IBM Systems. It was first implemented for commercial application in 1964.  Over the years flip chip technology represented a significant advancement in package assembly. Below is a quick overview of flip-chip technology.

Miniaturization and High Density

Si dies which are assembled using wire bonding, have a few drawbacks. Due to bonding limitations, for commercial application the number of bond pads are only limited to edge space of the four sides of the silicon dies. In most cases no more than 2 rows of bond pads are fabricated to avoid complex wire bonding related issues.

silicon dies

Illustration 1 –  Bond pads at the 4 sides of the die

Due to technological limitations, in order to reliably assemble the package using wire bonding the pad needs to be at least 35um x 35um in size (for 0.7 mil wires)

With flip chip devices on the other hand avoids all of these issues. Advanced micro bump technology now utilizes bump sizes starting at 10um and the full surface of the die can be used for bumping. This ability to use the full surface for bumping makes results in a smaller, more compact in other words a miniaturized IC chip

device with solder bumps

Illustration 2 – WLCSP device with solder bumps spanning full surface of the die

Improved performance

There is a significant distance between the ic chip and the substrate when connected with wires. As you can see in the above picture, the wire needs to travel a few millimeters from the IC to the substrate. But for flip chip devices this is not the case. Flip chip is directly connected to the substrate via bumps. For this reason the flip chip devices has lower inductance, resistance and capacitance compared to wire bonded devices.

Flip chip device connected to the substrate

Illustration 3 – Flip chip device connected to the substrate with under fill and solder resist.

Enhanced Heat Dissipation

Flip chip technology utilizes both top and bottom surfaces effectively. Bottom surface is mounted substrate for interconnects at the same time using underfill to attach and secure the die into the substrate. Top surface of the die and be directly connected to a heat sink. Modern computer processes use this technology for more efficient heat dissipation.

flip chip design and wire bonding design

Illustration 4 – Comparison between flip chip design and wire bonding design.

In conclusion, Flip Chip technology has revolutionized package assembly in the semiconductor industry. Its ability to enable miniaturization, improve performance, and maintain reliability makes it a key technology in the continuing evolution of electronic devices. As the demand for smaller, faster, and more efficient electronics grows, Flip Chip technology will likely continue to see advancements and wider applications.

Wire Bonding Techniques in Semiconductor Packaging

Wire bonding is a crucial process in semiconductor packaging. The process uses tiny wires, um in diameter wires to connect the semiconductor chip to the substrate. Even though newer technologies WLCSP devices with direct flip chip capabilities, wire bonded devices are used for the majority of applications. 

Three main types of wire bonding processes are typically used.

Thermosonic bonding: 

Technique heat, force, and ultrasonic energy are applied to the wire to make a bond connection between the wire and the chip or substrate. Few decades back thermosonic bonding was limited to Au (Gold) wires but due to increasing Au prices, for industrial high volume application, Cu wires are now being used. 

Thermosonic bonding

Ultrasonic Bonding: 

Mainly used for Al (aluminum) wire boning, ultrasonic bonding uses only ultrasonic energy for bonding purposes. Since no heat is used, Ultrasonic bonding is usually done without the use of a heating element (for Au and Cu wire bonding the substrate is heated 150C and above). Process relays on pressure and vibration to achieve a cold weld between the surfaces. 

Ultrasonic Bonding

Thermocompression Bonding: 

This technique relies on heat and force but does not use ultrasonic energy. Using a bonding tool heat and force is applied to the wire making it deform and connect with the bonding surface. Often used with Au wire bonding due to its malleability, Thermocompression bonding with Au wires are used when ultrasonic energy might damage the device. 

Thermocompression Bonding

Each method of wire bonding offers its own unique advantages and chooses based on the specific needs of the semiconductor device application. This may be the choice of wire material, desired strength, or reliability.  Intech Technologies is here to discuss your specific requirement and offer our expertise on the desired application. Please feel free to contact us and discuss any of your packaging needs.